6-1 semiconductor features ? 3.6a, 200v ?r ds(on) = 1.500 w ? temperature compensating pspice model ? peak current vs pulse width curve ? uis rating curve ? related literature - tb334 guidelines for soldering surface mount components to pc boards description these are advanced power mosfets designed, tested, and guaranteed to withstand a speci?c level of energy in the ava- lanche breakdown mode of operation. these are p-channel enhancement-mode silicon gate power ?eld-effect transis- tors designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high-power bipolar switching transistors requiring high speed and low gate-drive power. these types can be oper- ated directly from integrated circuits. formerly developmental type ta17502. symbol packaging ordering information part number package brand IRFR9220 to-252aa if9220 irfu9220 to-251aa if9220 note: when ordering use the entire part number. add the suf?x 9a to obtain the to-252aa variant in tape and reel, e.g., IRFR92209a. g d s jedec to-251aa jedec to-252aa gate source drain drain (flange) drain (flange) gate source september 1998 caution: these devices are sensitive to electrostatic discharge. users should follow proper esd handling procedures. copyright ? harris corporation 1998 file number 4015.2 IRFR9220, irfu9220 3.6a, 200v, 1.500 ohm, p-channel power mosfets [ /title (irfr9 220, irfu92 20) / sub- j ect (3.6a, 200v, 1.500 ohm, p-chan- nel power mos- fets) / author () / key- words (harris semi- conduc- tor, p- chan- nel power mos- fets, to- 251aa, to- 252aa) / cre- ator () / doci
6-2 absolute maximum ratings t c = 25 o c, unless otherwise speci?ed IRFR9220, irfu9220 units drain to source voltage (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v dss -200 v drain to gate voltage (r gs = 20k w ) (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .v dgr -200 v gate to source voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v gs 20 v continuous drain current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .i d pulsed drain current (note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i dm 3.6 refer to peak current curve a single pulse avalanche rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e as refer to uis curve power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p d linear derating factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 0.33 w w/ o c operating and storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t j, t stg -55 to 150 o c maximum temperature for soldering leads at 0.063in (1.6mm) from case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t l package body for 10s, see techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .t pkg 300 260 o c o c caution: stresses above those listed in absolute maximum ratings may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speci?cation is not im plied. note: 1. t j = 25 o c to 125 o c. electrical speci?cations t c = 25 o c, unless otherwise speci?ed parameter symbol test conditions min typ max units drain to source breakdown voltage bv dss i d = 250 m a, v gs = 0v -200 - - v gate to threshold voltage v gs(th) v gs = v ds , i d = 250 m a -2.0 - -4.0 v zero gate voltage drain current i dss v ds = rated bv dss , v gs = 0v - - -25 m a v ds = 0.8 x rated bv dss , v gs = 0v, t c = 150 o c - - -250 m a gate to source leakage current i gss v gs = 20v - - 100 na drain to source on resistance (note 2) r ds(on) i d = 2.2a, v gs = -10v (figure 9) - - 1.500 w turn-on time t on v dd = -100v, i d = 3.9a r l = 24 w , v gs = -10v r gs = 18 w (figures 13, 16, 17) - - 50 ns turn-on delay time t d(on) - 8.8 - ns rise time t r -27 - ns turn-off delay time t d(off) - 7.3 - ns fall time t f -19 - ns turn-off time t off - - 50 ns total gate charge q g(tot) v gs = 0 to -10v v dd = -160v, i d = 3.9a, r l = 41 w i g(ref) = 1.45ma -20 - nc gate to drain charge q gd -11 - nc gate to source charge q gs - 3.3 - nc input capacitance c iss v ds = -25v, v gs = 0v, f = 1mhz (figure 12) - 550 - pf output capacitance c oss - 110 - pf reverse transfer capacitance c rss -33 - pf thermal resistance junction to case r q jc - - 3.00 o c/w thermal resistance junction to ambient r q ja - - 100 o c/w source to drain diode speci?cations parameter symbol test conditions min typ max units source to drain diode voltage (note 2) v sd i sd = -3.6a - - -6.3 v diode reverse recovery time t rr i sd = -3.6a, di sd /dt = -100a/ m s - 150 300 ns reverse recovery charge q rr 0.97 2.0 m c notes: 2. pulse test: pulse width 300 m s, duty cycle 2%. 3. repetitive rating: pulse width limited by maximum junction temperature. see transient thermal impedance curve (figure 3). IRFR9220, irfu9220
6-3 typical performance curves unless otherwise speci?ed figure 1. normalized power dissipation vs case temperature figure 2. maximum continuous drain current vs case temperature figure 3. maximum transient thermal impedance figure 4. forward bias safe operating area figure 5. peak current capability 1.2 1.0 0.8 0.6 0.4 0.2 0 0 25 50 75 100 125 150 power dissipation multiplier t c , case temperature ( o c) -2 -4 -1 0 25 50 75 100 125 150 i d , drain current (a) t c , case temperature ( o c) -3 t 1 , rectangular pulse duration (s) 10 -5 10 -3 10 -2 10 -1 10 0 10 1 10 -4 0.01 10 0.1 1 z q jc , transient thermal impedance single pulse 0.01 0.02 0.05 0.1 0.2 0.5 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z q jc + t c p dm t 1 t 2 -20 -10 -1 -0.1 -1 -10 -100 v ds , drain to source voltage (v) i d , drain current (a) 100 m s 10ms 100ms dc v dss max = -200v 1ms -500 t c = 25 o c t j = max rated operation in this area may be limited by r ds(on) 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 -10 -50 t, pulse width (s) i dm , peak current capability (a) v gs = -20v v gs = -10v transconductance may limit current in this region for temperatures above 25 o c derate peak current capability as follows: -1 ii 25 150 t c C 125 ----------------------- ? ? ?? = t c = 25 o c IRFR9220, irfu9220
6-4 figure 6. unclamped inductive switching figure 7. saturation characteristics figure 8. transfer characteristics figure 9. normalized drain to source on resistance vs junction temperature figure 10. normalized gate threshold voltage vs temperature figure 11. normalized drain to source breakdown voltage vs temperature typical performance curves unless otherwise speci?ed (continued) -10 -1 0.01 0.1 1 10 t av , time in avalanche (ms) i as , avalanche current (a) starting t j = 150 o c starting t j = 25 o c if r = 0 t av = (l) (i as ) / (1.3 rated bv dss - v dd ) if r 1 0 t av = (l/r) ln [(i as *r) / (1.3 rated bv dss - v dd ) + 1] 0 0 -1.5 -3.0 -4.5 -6.0 -7.5 i d , drain current (a) v ds , drain to source voltage (v) v gs = -5v v gs = -6v v gs = -8v v gs = -7v v gs = -10v -1 -2 -3 -4 v gs = -4.5v v gs = -20v -5 pulse duration = 250 m s, t c = 25 o c 0 -1-2-3-4-5 v gs , gate to source voltage (v) i ds(on) , drain to source current (a) 0 pulse duration = 250 m s duty cycle = 0.5% max -55 o c 150 o c 25 o c -2 -4 -8 -6 -6 -7 v dd = -15v 2.0 1.5 1.0 0.5 0 -80 -40 0 40 80 120 160 t j , junction temperature ( o c) normalized on resistance 2.5 pulse duration = 250 m s v gs = -10v i d = -2.2a 2.0 1.5 1.0 0.5 0 -80 -40 0 40 80 160 120 threshold voltage t j , junction temperature ( o c) normalized gate v gs = v ds , i d = 250 m a 2.0 1.5 1.0 0.5 0 -80 -40 0 40 80 120 160 normalized drain to source breakdown voltage t j , junction temperature ( o c) i d = 250 m a IRFR9220, irfu9220
6-5 figure 12. capacitance vs drain to source voltage note: refer to application notes an7254 and an7260. figure 13. normalized switching waveforms for constant gate current test circuits and waveforms figure 14. unclamped energy test circuit figure 15. unclamped energy waveforms figure 16. switching time test circuit figure 17. resistive switching waveforms typical performance curves unless otherwise speci?ed (continued) 400 300 200 100 0 0 -5 -10 -15 -20 -25 c, capacitance (pf) v ds , drain to source voltage (v) 600 c iss c oss c rss 500 700 c iss = c gs + c gd c rss = c gd c oss ? c ds + c gd v gs = 0v, f = 1mhz -200 -120 -80 -40 0 -10.0 -6.0 -4.0 -2.0 0.0 20 i g(ref) i g(act) 80 i g(ref) i g(act) t, time ( m s) v dd = bv dss r l = 51 w i g(ref) = -1.45ma 0.75 bv dss 0.50 bv dss 0.25 bv dss 0.75 bv dss 0.50 bv dss 0.25 bv dss v ds , drain to source voltage (v) v gs , gate to source voltage (v) v gs = -10v -160 v dd = bv dss -8.0 t p 0.01 w l i as + - v ds v dd r g dut vary t p to obtain required peak i as 0v v gs v dd v ds bv dss t p i as t av 0 v gs r l r g dut + - v dd t d(on) t r 90% 10% v ds 90% t f t d(off) t off 90% 50% 50% 10% pulse width v gs t on 10% 0 0 IRFR9220, irfu9220
6-6 figure 18. gate charge test circuit figure 19. gate charge waveforms test circuits and waveforms (continued) 0.3 m f 12v battery 50k w +v ds s dut d g i g(ref) 0 (isolated -v ds 0.2 m f current regulator i d current sampling i g current sampling supply) resistor resistor dut q g(tot) q gd q gs v ds 0 v gs v dd 0 i g(ref) IRFR9220, irfu9220
6-7 pspice electrical model .subckt irfu9220 2 1 3 rev 9/6/94 ca 12 8 723e-12 cb 15 14 733e-12 cin 6 8 517e-12 dbody 5 7 dbdmod dbreak 5 11 dbkmod dplcap 10 6 dplcapmod ebreak 7 11 17 18 -244.4 eds 14 8 5 8 1 egs 13 8 6 8 1 esg 5 10 8 6 1 evto 20 6 8 18 1 it 8 17 1 ldrain 2 5 1e-9 lgate 1 9 2.609e-9 lsource 3 7 2.609e-9 mos1 16 6 8 8 mosmod m=0.99 mos2 16 21 8 8 mosmod m=0.01 rbreak 17 18 rbkmod 1 rdrain 50 16 rdsmod 1.194 rgate 9 20 2.17 rin 6 8 1e9 rldrain 2 5 10 rlgate 1 9 26.09 rlsource 3 7 26.09 rscl1 5 51 rsclmod 1e-6 rscl2 5 50 1e3 rsource 8 7 rdsmod 90.1e-3 rvto 18 19 rvtomod 1 s1a 6 12 13 8 s1amod s1b 13 12 13 8 s1bmod s2a 6 15 14 13 s2amod s2b 13 15 14 13 s2bmod vbat 8 19 dc 1 vto 21 6 -0.77 escl 51 50 value={(v(5,51)/abs(v(5,51)))*(pwr(v(5,51)*1e6/4.6,6))} .model dbdmod d (is=2.56e-14 rs=8.09e-2 trs1=-2.45e-3 trs2=-1.33e-5 cjo=4.21e-10 tt=1.17e-7) .model dbkmod d (rs=5.07 trs1=-1.05e-3 trs2=1.28e-5) .model dplcapmod d (cjo=170e-12 is=1e-30 n=10) .model mosmod pmos (vto=-3.58 kp=1.38 is=1e-30 n=10 tox=1 l=1u w=1u) .model rbkmod res (tc1=1.1e-3 tc2=-2.73e-6) .model rdsmod res (tc1=6.95e-3 tc2=2.23e-5) .model rsclmod res (tc1=2.40e-3 tc2=-1.5e-5) .model rvtomod res (tc1=-3.27e-3 tc2=-1.33e-6) .model s1amod vswitch (ron=1e-5 roff=0.1 von=5.29 voff=3.29) .model s1bmod vswitch (ron=1e-5 roff=0.1 von=3.29 voff=5.29) .model s2amod vswitch (ron=1e-5 roff=0.1 von=0.1 voff=-4.9) .model s2bmod vswitch (ron=1e-5 roff=0.1 von=-4.9 voff=0.1) .ends note: for further discussion of the pspice model, consult a new pspice sub-circuit for the power mosfet featuring global tem- perature options ; written by william j. hepp and c. frank wheatley. 1 gate lgate dbreak dbody ldrain drain rsource lsource source dplcap 10 11 7 3 2 rlgate rldrain rlsource ca rbreak rvto vbat + - 19 it eds egs s1a s2a s2b s1b cb 18 17 12 15 14 13 13 8 14 13 5 8 + - + - 6 8 evto rgate 20 9 18 8 + - esg 6 8 + - rin cin mos1 mos2 vto 6 5 16 21 8 + rdrain escl rscl1 rscl2 51 50 + - 5 51 ebreak + 17 18 - IRFR9220, irfu9220
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